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| FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET March 2007 FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET N-Channel: 30V, 8.6A, 17.0m P-Channel: -30V, -7.3A, 20.5m Features Q1: N-Channel Max rDS(on) = 17m at VGS = 10V, ID = 8.6A Max rDS(on) = 20m at VGS = 4.5V, ID = 7.3A Q2: P-Channel Max rDS(on) = 20.5m at VGS = -10V, ID = -7.3A Max rDS(on) = 34.5m at VGS = -4.5V, ID = -5.6A High power and handing capability in a widely used surface mount package Fast switching speed Inverter Synchronous Buck General Description These dual N and P-Channel enhancement mode power MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. resistance and yet maintain Application D2 D2 D1 D1 SO-8 S2 Pin 1 S1 G1 G2 D1 D1 7 8 D2 6 Q1 3 2 1 S2 G1 S1 D2 5 Q2 4 G2 MOSFET Maximum Ratings TA = 25C unless otherwise noted Symbol VDS VGS ID Parameter Drain to Source Voltage Gate to Source Voltage Drain Current - Continuous - Pulsed Power Dissipation for Dual Operation PD TJ, TSTG Power Dissipation for Single Operation Operating and Storage Junction Temperature Range TA = 25C TA = 25C (Note 1a) (Note 1c) TA = 25C Q1 30 20 8.6 20 2.0 1.6 0.9 -55 to +150 C W Q2 -30 25 -7.3 -20 Units V V A Thermal Characteristics RJC RJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1) (Note 1a) 40 78 C/W Package Marking and Ordering Information Device Marking FDS8858CZ Device FDS8858CZ Package SO-8 Reel Size 13" Tape Width 12mm Quantity 2500 units (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 1 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V ID = -250A, VGS = 0V ID = 250A, referenced to 25C ID = -250A, referenced to 25C VDS = 24V, VGS = 0V VDS = -24V, VGS = 0V VGS = 20V, VDS = 0V VGS = 25V, VDS = 0V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 -30 22 22 1 -1 10 10 V mV/C A A On Characteristics VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250A VGS = VDS, ID = -250A ID = 250A, referenced to 25C ID = -250A, referenced to 25C VGS = 10V, ID = 8.6A VGS = 4.5V, ID = 7.3A VGS = 10V, ID = 8.6A, TJ = 125C VGS = -10V, ID = -7.3A VGS = -4.5V, ID = -5.6A VGS = -10V, ID = -7.3A, TJ = 125C VDS = 5V, ID = 8.6A VDS = -5V, ID = -7.3A Q1 Q2 Q1 Q2 Q1 1 -1 1.6 -2.1 -5.4 -6.0 12.4 15.2 17.7 17.1 26.5 24.0 27 21 17.0 20.0 24.3 20.5 34.5 28.8 3 -3 V mV/C rDS(on) Static Drain to Source On Resistance m Q2 Q1 Q2 gFS Forward Transconductance S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Q1 VDS = 15V, VGS = 0V, f = 1MHZ Q2 VDS = -15V, VGS = 0V, f = 1MHZ Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 905 1675 180 290 110 260 1.3 4.4 1205 2230 240 390 165 390 pF pF pF f = 1MHz Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain "Miller" Charge Q2 VGS = -10V, VDD = -15V, ID = -7.3A Q1 VDD = 15V, ID = 8.6A, VGS = 10V, RGEN = 6 Q2 VDD = -15V, ID = -7.3A, VGS = -10V, RGEN = 6 Q1 VGS = 10V, VDD = 15V, ID = 8.6A Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 7 9 3 10 19 33 3 16 17 33 2.7 6.1 3.4 8.5 14 18 10 20 35 53 10 29 24 46 ns ns ns ns nC nC nC (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 2 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics VSD trr Qrr Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 78C/W when mounted on a 0.5 in2 pad of 2 oz copper b) 125C/W when mounted on a 0.02 in2 pad of 2 oz copper c) 135C/W when mounted on a minimun pad Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 8.6A VGS = 0V, IS = -7.3A Q1 IF = 8.6A, di/dt = 100A/s Q2 IF = -7.3A, di/dt = 100A/s (Note 2) (Note 2) Q1 Q2 Q1 Q2 Q1 Q2 0.8 0.9 25 28 19 22 1.2 -1.2 38 42 29 33 V ns nC Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%. (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 3 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25C unless otherwise noted 20 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 VGS = 10V VGS = 4.5V VGS = 3.5V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX VGS = 3.0V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 16 ID, DRAIN CURRENT (A) 2.5 2.0 VGS = 3.5V 12 8 4 0 0 VGS = 3.0V 1.5 1.0 VGS = 4.5V VGS = 10V 0.5 0 4 8 12 16 20 ID, DRAIN CURRENT(A) 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On- Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 35 SOURCE ON-RESISTANCE (m) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.6 1.4 1.2 1.0 0.8 0.6 -75 ID = 8.6A VGS = 10V ID = 8.6A PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 30 25 TJ = 125oC rDS(on), DRAIN TO 20 15 10 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) TJ = 25oC -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On - Resistance vs Junction Temperature 20 16 ID, DRAIN CURRENT (A) VDS = 5V IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX Figure 4. On-Resistance vs Gate to Source Voltage 20 10 VGS = 0V 1 TJ = 150oC TJ = 25oC 12 TJ = 25oC 0.1 8 4 0 0 TJ = 150oC TJ = -55oC 0.01 TJ = -55oC 1 2 3 4 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 4 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25C unless otherwise noted 10 VGS, GATE TO SOURCE VOLTAGE(V) ID = 8.6A 3000 Ciss VDD = 10V VDD = 15V 8 6 4 2 0 0 4 8 12 16 20 Qg, GATE CHARGE(nC) CAPACITANCE (pF) 1000 Coss VDD = 20V Crss 100 50 0.1 f = 1MHz VGS = 0V 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 10 Ig, GATE LEAKAGE CURRENT(A) -3 20 IAS, AVALANCHE CURRENT(A) VDS = 0V 10 10 -4 TJ = 125oC TJ = 25oC TJ = 125oC 10 -5 TJ = 25oC 10 -6 1 0.01 0.1 1 10 tAV, TIME IN AVALANCHE(ms) 100 10 -7 0 5 10 15 20 25 30 VGS, GATE TO SOURCE VOLTAGE(V) Figure 9. Unclamped Inductive Switching Capability 8 ID, DRAIN CURRENT (A) Figure 10. Gate Leakage Current vs Gate to Source Voltage 50 ID, DRAIN CURRENT (A) 6 VGS = 10V 10 1ms 4 VGS = 4.5V 1 THIS AREA IS LIMITED BY rDS(on) 10ms 100ms SINGLE PULSE TJ = MAX RATED RJA = 135 C/W TA = 25oC o 2 RJA = 78 C/W o 0.1 1s 10s DC 0 25 50 75 100 125 o 150 0.01 0.1 1 10 80 TA, AMBIENT TEMPERATURE ( C) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Maximum Continuous Drain Current vs Ambient Temperature Figure 12. Forward Bias Safe Operating Area (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 5 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel)TJ = 25C unless otherwise noted 300 VGS = 10V P(PK), PEAK TRANSIENT POWER (W) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 150 - T A -----------------------125 100 10 TA = 25oC SINGLE PULSE 1 0.5 -3 10 RJA = 135 C/W o 10 -2 10 -1 10 0 10 1 10 2 10 3 t, PULSE WIDTH (s) Figure 13. Single Pulse Maximum Power Dissipation 2 1 NORMALIZED THERMAL IMPEDANCE, ZJA DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM t1 t2 0.01 0.0003 -3 10 SINGLE PULSE RJA = 135oC/W NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJA + TA 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 14. Transient Thermal Response Curve (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 6 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 P-Channel)TJ = 25C unless otherwise noted 20 VGS = -10V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 4.0 3.5 VGS = -3V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX -ID, DRAIN CURRENT (A) 16 VGS = -4.5V 3.0 2.5 VGS = -3.5V 12 8 4 0 0 1 VGS = -3.5V 2.0 1.5 1.0 0.5 0 4 8 12 16 20 -ID, DRAIN CURRENT(A) VGS = -4.5V VGS = -10V VGS = -3V 2 3 4 5 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 15. On- Region Characteristics Figure 16. Normalized on-Resistance vs Drain Current and Gate Voltage 60 SOURCE ON-RESISTANCE (m) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 0.8 0.6 -75 ID = -7.3A VGS = -10V ID = -7.3A PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 50 40 30 20 TJ = 25oC TJ = 125oC rDS(on), DRAIN TO -50 -25 0 25 50 75 100 125 150 10 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 17. Normalized On- Resistance vs Junction Temperature Figure 18. On-Resistance vs Gate to Source Voltage 20 -IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX -ID, DRAIN CURRENT (A) 30 10 1 0.1 0.01 0.001 VGS = 0V 16 12 8 TJ = 25oC TJ =-55oC VDS = -5V TJ = 150oC TJ = 25oC TJ = -55oC 4 TJ = 125oC 0 0 1 2 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 19. Transfer Characteristics Figure 20. Source to Drain Diode Forward Voltage vs Source Current (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 7 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics(Q2 P-Channel)TJ = 25oC unless otherwise noted 10 -VGS, GATE TO SOURCE VOLTAGE(V) 4000 ID = -7.3A VDD = -10V CAPACITANCE (pF) Ciss 8 VDD = -15V 6 VDD = -20V 1000 Coss 4 2 0 0 7 14 21 28 35 -Qg, GATE CHARGE(nC) Crss f = 1MHz VGS = 0V 100 0.1 1 10 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 21. Gate Charge Characteristics Figure 22. Capacitance vs Drain to Source Voltage 10 -Ig, GATE LEAKAGE CURRENT(A) -3 20 -IAS, AVALANCHE CURRENT(A) VDS = 0V 10 10 10 10 10 -4 -5 TJ = TJ = 125oC 25oC TJ = 125oC -6 -7 TJ = 25oC 1 0.01 10 0.1 1 10 30 tAV, TIME IN AVALANCHE(ms) -8 0 5 10 15 20 25 30 -VGS, GATE TO SOURCE VOLTAGE(V) Figure 23. Unclamped Inductive Switching Capability 8 Figure 24. Gate Leakage Current vs Gate to Source Voltage 60 -ID, DRAIN CURRENT (A) VGS = -10V -ID, DRAIN CURRENT (A) 6 10 1ms 4 VGS = -4.5V 1 THIS AREA IS LIMITED BY rDS(on) 10ms 100ms SINGLE PULSE TJ = MAX RATED RJA = 135 C/W o 2 RJA = 78 C/W o 0.1 1s 10s DC 0 25 50 75 100 o 125 150 TA = 25oC TA, AMBIENT TEMPERATURE ( C) 0.01 0.1 1 10 80 -VDS, DRAIN to SOURCE VOLTAGE (V) Figure 25. Maximum Continuous Drain Current vs Ambient Temperature Figure 26. Forward Bias Safe Operating Area (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 8 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET Typical Characteristics(Q2 P-Channel) TJ = 25oC unless otherwise noted 300 VGS = 10V P(PK), PEAK TRANSIENT POWER (W) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 150 - T A -----------------------125 100 10 TA = 25oC SINGLE PULSE 1 0.5 -3 10 RJA = 135 C/W o 10 -2 10 -1 10 0 10 1 10 2 10 3 t, PULSE WIDTH (s) Figure 27. Single Pulse Maximum Power Dissipation 2 1 NORMALIZED THERMAL IMPEDANCE, ZJA DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM t1 t2 0.01 0.0003 -3 10 SINGLE PULSE RJA = 135 C/W o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJA + TA 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 28. Transient Thermal Response Curve (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B 9 www.fairchildsemi.com FDS8858CZ Dual N & P-Channel PowerTrench(R) MOSFET tm TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx(R) Across the board. Around the world.TM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM CTLTM Current Transfer LogicTM DOMETM E2CMOSTM EcoSPARK(R) EnSignaTM FACT Quiet SeriesTM FACT(R) FAST(R) FASTrTM FPSTM FRFET(R) GlobalOptoisolatorTM GTOTM HiSeCTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM MICROCOUPLERTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANAR(R) PACMANTM POPTM Power220(R) Power247(R) PowerEdgeTM PowerSaverTM PowerTrench(R) Programmable Active DroopTM QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM ScalarPumpTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM The Power Franchise(R) TM TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyWireTM TruTranslationTM SerDesTM UHC(R) UniFETTM VCXTM WireTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor.The datasheet is printed for reference information only. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production Rev. I24 (c)2007 Fairchild Semiconductor Corporation FDS8858CZ Rev.B www.fairchildsemi.com |
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